Design-Reuse

Digital Blocks Introduces the DB9100 BitBLT / 2D Graphics Engine Verilog IP Core Family for Accelerated Graphics Display Applications

The DB9100 BitBLT / 2D Graphics Engine IP Core accelerates graphics development for ASIC, ASSP, & FPGA design teams, while off-loading the graphics function from the main Processor and enhancing ...
Design-Reuse

BitBLT Graphics Hardware Accelerator (AXI Bus)

The Digital Blocks DB9100AXI3 BitBLT Graphics Hardware Accelerator Verilog IP Core renders a graphics frame by generating new bitmaps from commands to ...