EDN

LVDS, CML, ECL-differential interfaces with odd voltages

There are many differential signaling technologies available today. Some are defined by industry standard committees, such as the TIA, IEEE, or JEDEC groups. Others are more “vendor specific” flavors ...
EDN

Save valuable picoseconds using ECL-wired OR

Often, when you are designing with high-speed ECL (emitter-coupled logic), you have too little time between clock cycles to implement logic functions using gates between flip‑flops. In these cases, ...
Design-Reuse

A Digital Design Flow for Differential ECL High Speed Applications

This paper presents a digital design flow in order to design high performance differential Emitter Coupled Logic (ECL) circuits efficiently. The proposed flow is similar to the ordinary digital CMOS ...
Electronic Design

Translator Family Creates ECL-To-LVDS Bridges

The companyÕs line of timing and logic products now includes a family of translators for use in bridging devices with ECL I/O to LVDS I/O used in todayÕs CMOS ICs. Supporting OC-3 to OC-192 systems, ...
Design-Reuse

Phase-frequency detector in ECL logic

The phase-frequency detector (PFD) consists of 2 D-trigger with reset from external circuit, performed in ECL logic and multiplexer, which allow to sw ...