Shared bus interfaces and memory test These days, designs contain a huge number of memory arrays embedded in the core, and these memories often consume a substantial portion of the total chip area.

Marvell achieved silicon success for networking SoC using the multi-memory bus (MMB) processor in the Synopsys DesignWare STAR Memory System for embedded test and repair Reduced area and power with a ...

Remember the GeForce GTX 280? The "GT200" GPU was a gigantic beast that maxed out the limits of the "Tesla" design it was based on. It boasted 32 ROPs and something almost unseen in graphics cards ...

We've been hearing leaks and rumors about the next generation of Radeons since before the current generation even came out. Sometimes it's hard to differentiate between leaks and rumors, but as we get ...

A look back at the development of dynamic random-access memory (DRAM) over the years shows that DRAMs have historically been developed primarily by taking the needs of the PC market into consideration ...

[Andy Geppert] sends in his incredibly clever interactive core memory shield. In a great display of one hacker’s work being the base for another’s, [Andy] started out with [Jussi Kilpelainen]’s core ...

As we head into summer, more information about AMD's upcoming GPU architecture is finally coming to light. So far there hasn't been a lot of information to peruse, despite there being a deluge of ...