EDN

Xilinx simplifies memory interface designs with complete FPGA solutions

Xilinx has announced immediate availability of its low cost Spartan-3A FPGA development kit for DDR2 SDRAM interfaces, the Virtex-5 FPGA development platform (ML-561) for multiple high-performance ...
EDN

Xilinx simplifies memory interface designs

San Jose, Calif.—Xilinx Inc. announced immediate availability of its low-cost Spartan-3A FPGA development kit for DDR2 SDRAM interfaces, the Virtex-5 FPGA development platform (ML-561) for multiple ...
Design-Reuse

Xilinx Delivers DDR2-400 Support for Spartan-3 Generation FPGAs with Hardware-Verified Reference Design

Free reference design enables designers of HDTV and other high-performance, high-volume applications to quickly implement 400 Mbps DDR2 SDRAM interfaces with FPGAs SAN JOSE, Calif., August 7, 2007 – ...
Electronic Design

Clock Generator Keeps The Pace For XDR Interface

To support the recently released Yellowstone high-speed memory interface, now renamed the extreme data rate (XDR) interface, designers at Rambus Inc. and Integrated Circuit Systems Inc. jointly... To ...
Electronic Design

UMI Scales the Memory Wall in the Chiplet/Multi-Die Era

What are the current challenges involved with incorporating sufficient HBM into multi-die design? How a new interconnect technology can address the performance, size, and power issues that could ...